Tokyo Electron Limited announced today that it will begin sales of a process resulting from joint development with Clariant (Japan) KK (Head Office: Bunkyo-ku, Tokyo; President: Hideo Kato), the Japanese subsidiary of Swiss manufacturer Clariant. Beginning last year, the two companies carried out the joint development of surfactant rinse (FIRM™) solutions and processes for the formation of ultra-fine patterns that are utilized in next-generation semiconductor production processes.

Many problems have been cited in next-generation semiconductor manufacturing processes as devices become ever smaller. A particularly serious problem is pattern collapse, a phenomenon wherein the capillary effect causes photoresist patterns to collapse during the developing process, which results from the increasingly small photoresist images. This phenomenon is likely to occur when the aspect ratio, defined as the ratio of photoresist film thickness to the width of a pattern, is three or greater, and would thus pose a problem to image ultra-fine photoresist patterns.

The surfactant rinse solution is intended to suppress pattern collapse. It is the culmination of an approach based on a new concept that uses surfactants to reduce the capillary forces that cause pattern collapse, thus facilitating further miniaturization of photoresist patterns. In the project, TEL primarily handled materials evaluations and process development, while Clariant mainly carried out surfactant development. Using this rinse process, TEL has established its CLEAN TRACK™ equipment capable of 90nm mass production.

Compared with supercritical fluid processing, another method of suppressing pattern collapse, this new process is enabled through a simple modification of existing equipment, and is being evaluated by major semiconductor manufacturers worldwide. Having already been verified as extendible to 55nm patterns, the joint development of the process is expected to be concluded by years end. Plans call for TEL to market and provide rinse supply hardware and process optimization, and for Clariant to manufacture the rinse solution.

It is essential for materials and equipment manufacturers to work closely together to develop next-generation materials and processes. Cooperation between TEL, a leading supplier in the semiconductor production equipment industry, and Clariant, an influential maker of chemical products for manufacturing semiconductors and flat-panel displays, will enable the former to meet the demands of ultra-fine lithography for next-generation process technology, and the latter to further improve its business in photoresist-related materials by launching new products.

CLEAN TRACK is a trademark of Tokyo Electron Limited.

FIRM is a trademark of Tokyo Electron Limited.

About Clariant

Clariant, an influential maker of chemical products for manufacturing semiconductors and flat-panel displays, will enable the former to further improve sales of its own products by establishing this high efficient next generation process technology, and the latter to further improve its business in photoresist-related materials by launching new products.